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Добавил модуль LoadOrder

Anatoliy Chigirinskiy před 1 rokem
rodič
revize
487b9dc8ee

+ 6 - 18
src/src/LoadOrder/LoadOrder.v

@@ -8,10 +8,8 @@ module LoadOrder (
     input [3:0] LmxWordNum_i,
     input [2:0] DdsWordNum_i,
 
-	/* If Load order is 0 Dds is busy until Lmx is done */
-    output reg DdsBusy_o,
-    /* If Load order is 1 Lmx is busy until Dds is done */
-    output reg LmxBusy_o
+    output reg DdsBusy_o
+
 );
 //================================================================================
 //	                                REG/WIRE
@@ -36,29 +34,19 @@ end
 
 always @(posedge WrClk_i) begin 
     if (Rst_i) begin 
-        LmxBusy_o <= 1'b0;
         DdsBusy_o <= 1'b0;
     end
     else begin 
-        if (loadOrder) begin 
-            if (LmxWordNum_i != 0 ) begin 
-                LmxBusy_o <= 1'b1;
-                DdsBusy_o <= 1'b0;
+        if (!loadOrder) begin 
+            if (DdsWordNum_i != 0) begin 
+                DdsBusy_o <= 1'b1;
             end
             else begin 
-                LmxBusy_o <= 1'b0;
                 DdsBusy_o <= 1'b0;
             end
         end
         else begin 
-            if (DdsWordNum_i != 0 ) begin 
-                LmxBusy_o <= 1'b0;
-                DdsBusy_o <= 1'b1;
-            end
-            else begin 
-                LmxBusy_o <= 1'b0;
-                DdsBusy_o <= 1'b0;
-            end
+            DdsBusy_o <= 1'b0;
         end
     end
 end

+ 8 - 9
src/src/PacketAnalyzer4Mosi/PacketAnalyzer4Mosi.v

@@ -61,7 +61,6 @@ reg [22:0] dataSpiReg;
 //==========================================
 wire lmxOr;
 wire ddsOr;
-wire loadOrderOr;
 wire potOr;
 wire dacOr;
 wire attOr;
@@ -102,7 +101,6 @@ assign attOr 	= 	 dataSpiReg[1];
 assign shRegOr 	= 	|dataSpiReg[7:6];
 assign maxOr 	= 	|dataSpiReg[10:9];
 assign gpioOr 	= 	|dataSpiReg[17:16];
-assign loadOrderOr = dataSpiReg[22];
 
 assign selector = {lmxOr, gpioOr, ddsOr, maxOr, shRegOr, potOr, dacOr, attOr};
 
@@ -143,6 +141,7 @@ always @(posedge Clk_i) begin
 			LmxWordNum_o <= DataFromSpi_i[21:18];
 			DdsWordNum_o <= DataFromSpi_i[14:12];
 			ValWordNum_o <= 1'b1;
+			ValLoadOrder_o <= 1'b1;
 		end
 		else begin
 			casez(selector)
@@ -150,7 +149,7 @@ always @(posedge Clk_i) begin
 				dataSpiReg <= dataSpiReg - DECREMENT_LMX;
 				ValLmxDataToFifo_o <= 1'b1;
 			end
-			9'b001??????: begin //GPIO
+			8'b01??????: begin //GPIO
 				dataSpiReg <= dataSpiReg - DECREMENT_GPIO;
 				ValGpioDataToFifo_o <= 1'b1;
 			end
@@ -158,23 +157,23 @@ always @(posedge Clk_i) begin
 				dataSpiReg <= dataSpiReg - DECREMENT_DDS;
 				ValDdsDataToFifo_o <= 1'b1;
 			end
-			9'b00001????: begin //MAX
+			8'b0001????: begin //MAX
 				dataSpiReg <= dataSpiReg - DECREMENT_MAX;
 				ValMaxDataToFifo_o <= 1'b1;
 			end
-			9'b000001???: begin //ShReg
+			8'b00001???: begin //ShReg
 				dataSpiReg <= dataSpiReg - DECREMENT_SH_REG;
 				ValShRegDataToFifo_o <= 1'b1;
 			end
-			9'b0000001??: begin //Pot
+			8'b000001??: begin //Pot
 				dataSpiReg <= dataSpiReg - DECREMENT_POT;
 				ValPotDataToFifo_o <= 1'b1;
 			end
-			9'b00000001?: begin //DAC
+			8'b0000001?: begin //DAC
 				dataSpiReg <= dataSpiReg - DECREMENT_DAC;
 				ValDacDataToFifo_o <= 1'b1;
 			end
-			9'b000000001: begin //ATT
+			8'b00000001: begin //ATT
 				dataSpiReg <= dataSpiReg - DECREMENT_ATT;
 				ValAttDataToFifo_o <= 1'b1;
 			end
@@ -187,7 +186,6 @@ always @(posedge Clk_i) begin
 				ValShRegDataToFifo_o <= 1'b0;
 				ValMaxDataToFifo_o <= 1'b0;
 				ValGpioDataToFifo_o <= 1'b0;
-				ValLoadOrder_o <= 1'b0;
 			end
 		endcase
 //=========================DELETE AFTER HARDWARE TEST===========================
@@ -247,6 +245,7 @@ always @(posedge Clk_i) begin
 		ValGpioDataToFifo_o 	<= 1'b0;
 		ValLoadOrder_o 		<= 1'b0;
 		ValWordNum_o <= 1'b0;
+		ValLoadOrder_o <= 1'b0;
 	end
 end
 

+ 5 - 3
src/src/Top/TopSbTmsg.v

@@ -200,6 +200,8 @@ localparam [11:0] FIRMWARE_VER	= 12'h1;
 
 	wire [23:0] servInfo;
 
+	/* Load order signals */
+	wire ddsBusy;
 //================================================================================
 //  ASSIGNMENTS
 //================================================================================
@@ -453,8 +455,7 @@ LoadOrder LoadOrder
 	.LmxWordNum_i	(lmxWordNumReg),
 	.DdsWordNum_i	(ddsWordNumReg),
 
-	.DdsBusy_o		(ddsBusy),
-	.LmxBusy_o		(lmxBusy)
+	.DdsBusy_o		(ddsBusy)
 );
 
 LmxWrapper #(
@@ -464,7 +465,7 @@ LmxWrapper #(
 	.DATA_WIDTH			(24)
 ) LmxWrapper(
 	.WrClk_i			(clk60),
-	.RdClk_i			(clk60),
+	.RdClk_i			(clk50),
 	.Rst_i				(initRst),
 	.Data_i				(spiData),
 	.Val_i				(valLmxDataToFifo),
@@ -472,6 +473,7 @@ LmxWrapper #(
 	.LmxWordNumVal_i	(valWordNum),
 	.DdsWordNumReg_i	(ddsWordNumReg),
 	.DdsCs_i			(ddsCsSpiM),
+	.DdsBusy_i			(ddsBusy),
 	.LmxDirectFlag_i	(flagDirectLmx),	
 	.PllVtuneCtrl_o		(PllVtuneCtrl_o),
 	.LmxWordNumReg_o	(lmxWordNumReg),

+ 2 - 2
src/src/Top/TopSbTmsgTb.sv

@@ -123,7 +123,7 @@ localparam [23:0] InitDacHeader         = {1'h0, DeviceIdDac, DacWordInitNum, 1'
 localparam [23:0] InitAttHeader         = {1'h0, DeviceIdAtt, AttWordInitNum, 1'h1};
 localparam [23:0] InitShRegHeader       = {1'h0, DeviceIdShReg, ShRegWordInitNum, 1'h1};
 
-localparam [3:0]  LMXWordNum = 4'd1;
+localparam [3:0]  LMXWordNum = 4'd4;
 localparam [2:0]  DDSWordNum = 3'd4;
 localparam        POTWordNum = 2'd2;
 localparam        DACWordNum = 1'd1;
@@ -175,7 +175,7 @@ assign Mosi0_o = (modeSel) ? mosi0Q : mosi0R;
 assign Mosi1_io = (anyFlag) ? 1'bz : Mosi1_o;
 assign MisoLdLmx_i = 1'b1;
 
-assign emptyFlagTx = (trCnt > 58) ? 1'b1 : 1'b0;
+assign emptyFlagTx = (trCnt > 61) ? 1'b1 : 1'b0;
 assign QSPITotalWordNum = LMXWordNum + DDSWordNum + POTWordNum + DACWordNum + ATTWordNum + ShRegWordNum + MaxWordNum + GPIOWordNum; 
 
 assign currClk = (modeSel) ? Clk60 : Clk10;

+ 2 - 1
src/src/WrapFifoChain/LmxWrapper.v

@@ -30,6 +30,7 @@ module LmxWrapper #(
 	input [3:0] LmxWordNum_i,
 	input [2:0] DdsWordNumReg_i,
 	input DdsCs_i,
+	input DdsBusy_i,
 	input LmxDirectFlag_i,
 	input LmxWordNumVal_i,
 
@@ -180,7 +181,7 @@ FifoCtrl #(
 	.Rst_i			(Rst_i),
 	.Data_i			(Data_i),
 	.Val_i			(Val_i),
-	.BusySpiM_i		(busySpiMLmx),
+	.BusySpiM_i		(busySpiMLmx | DdsBusy_i),
 	.FifoFull_i		(lmxFifoFull),
 	.FifoEmpty_i	(lmxFifoEmpty),
 	.Data_o			(dataFromLmxFifoCtrl),