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Добавлен фильтр для Rst_i

Anatoliy Chigirinskiy 1 år sedan
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6dda84fab6

+ 7 - 7
src/constr/SbTmsg.cst

@@ -4,7 +4,7 @@
 //Tool Version: V1.9.9.03 (64-bit)
 //Part Number: GW1N-LV9PG256C6/I5
 //Device: GW1N-9
-//Created Time: Tue 09 10 12:55:07 2024
+//Created Time: Mon 09 16 11:02:59 2024
 
 IO_LOC "DataMax2870MixRf2_o" C1;
 IO_PORT "DataMax2870MixRf2_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
@@ -101,18 +101,14 @@ IO_LOC "I2cScl_o" K16;
 IO_PORT "I2cScl_o" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
 IO_LOC "I2cSda_io" L16;
 IO_PORT "I2cSda_io" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
-IO_LOC "Mosi1_io" T12;
-IO_PORT "Mosi1_io" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
-IO_LOC "MisoLdMax2870_i" B1;
-IO_PORT "MisoLdMax2870_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
-IO_LOC "MisoDds_i" T3;
-IO_PORT "MisoDds_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "MisoLdLmx_i" F2;
 IO_PORT "MisoLdLmx_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "Mosi3_i" T15;
 IO_PORT "Mosi3_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "Mosi2_i" T14;
 IO_PORT "Mosi2_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
+IO_LOC "Mosi1_io" T12;
+IO_PORT "Mosi1_io" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "Mosi0_i" R12;
 IO_PORT "Mosi0_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "Ss_i" T9;
@@ -123,3 +119,7 @@ IO_LOC "Rst_i" R9;
 IO_PORT "Rst_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
 IO_LOC "Clk_i" H11;
 IO_PORT "Clk_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
+IO_LOC "MisoLdMax2870_i" B1;
+IO_PORT "MisoLdMax2870_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
+IO_LOC "MisoDds_i" T3;
+IO_PORT "MisoDds_i" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;

+ 2 - 2
src/src/Gpio1Ctrl/Gpio1Ctrl.v

@@ -25,12 +25,12 @@ module Gpio1Ctrl (
 
 	input FlagDirectGpio1_i,
 
-	output reg [21:0] GpioReg_o
+	output reg [23:0] GpioReg_o
 );
 
 always @(posedge Clk_i) begin 
 	if (ValGpioDataToFifo_i || (FlagDirectGpio1_i && ValDataFromSpi_i)) begin 
-		GpioReg_o <= Data_i[21:0];
+		GpioReg_o <= Data_i[23:0];
 	end
 end
 

+ 3 - 0
src/src/InterfaceArbiter/InterfaceArbiter.v

@@ -275,6 +275,9 @@ module InterfaceArbiter
 					end
 				end
 			end
+			else begin 
+				spiMode <= spiMode;
+			end
 		end
 	end
 	

+ 32 - 0
src/src/PulseFilter/PulseFilter.v

@@ -0,0 +1,32 @@
+module PulseFilter (
+    input Clk_i,        // тактовый сигнал
+    input  Rst_i,        // сигнал сброса
+    input  Signal_i,  // входной сигнал с помехами
+    output reg SignalFilt_o  // отфильтрованный сигнал
+);
+
+    // Параметры для настройки фильтра
+    parameter WIDTH = 3;  // Ширина счетчика (длительность фильтрации)
+
+    reg [WIDTH-1:0] counter; // Счетчик для фильтрации
+
+    always @(posedge Clk_i) begin
+        if (Rst_i) begin
+            counter <= 0;
+            SignalFilt_o <= 0;
+        end
+        else begin
+            // Проверяем, если входной сигнал стабилен в течение длительности фильтрации
+            if (Signal_i == SignalFilt_o) begin
+                counter <= 0;  // Сбрасываем счетчик, если сигнал стабилен
+            end else begin
+                counter <= counter + 1;  // Увеличиваем счетчик, если сигнал меняется
+                if (counter == (1 << WIDTH) - 1) begin
+                    SignalFilt_o <= Signal_i;  // Изменяем выходной сигнал, если счетчик достиг предела
+                    counter <= 0;
+                end
+            end
+        end
+    end
+
+endmodule

+ 47 - 38
src/src/Top/TopSbTmsg.v

@@ -35,7 +35,7 @@ module TopSbTmsg
 	input Ss_i,
 	
 	input Mosi0_i,
-	inout Mosi1_io,
+	input Mosi1_io,
 	input Mosi2_i,
 	input Mosi3_i,
 	
@@ -198,6 +198,8 @@ localparam [11:0] FIRMWARE_VER	= 12'h1;
 
 	wire [23:0] servInfo;
 
+	wire rstFiltered;
+
 //================================================================================
 //  ASSIGNMENTS
 //================================================================================
@@ -227,41 +229,41 @@ assign RfSw1_o 				= gpio1CtrlData[0];
 assign anyFlag = flagDirectTemp | flagDirectMax | flagDirectDds | flagDirectLmx | flagDirectGpio2;//Debug-only
 
 assign RfLd_o = MisoLdLmx_i;
-assign Mosi1_io = misoReg;
+// assign Mosi1_io = misoReg;
 assign AnyFlag_o = anyFlag;//Debug-only
 
 assign servInfo	= {BOARD_VER, FIRMWARE_VER};
 
 //================================================================================
 //  CODING
-always @(*) begin 
-	if (Rst_i) begin 
-		misoReg = 1'b0;
-	end
-	else begin 
-		if (flagDirectLmx) begin 
-			misoReg = MisoLdLmx_i;
-		end
-		else if (flagDirectDds) begin 
-			misoReg = MisoDds_i;
-		end
-		else if (flagDirectMax) begin 
-			misoReg = MisoLdMax2870_i;
-		end
-		else if (flagDirectTemp) begin 
-			misoReg = misoTemp;
-		end
-		else if (flagDirectGpio2) begin 
-			misoReg = misoGpio2;
-		end
-		else if (flagDirectServInfo) begin 
-			misoReg = misoServInfo;
-		end
-		else begin 
-			misoReg = 1'bz;
-		end
-	end
-end
+// always @(*) begin 
+// 	if (Rst_i) begin 
+// 		misoReg = 1'b0;
+// 	end
+// 	else begin 
+// 		if (flagDirectLmx) begin 
+// 			misoReg = MisoLdLmx_i;
+// 		end
+// 		else if (flagDirectDds) begin 
+// 			misoReg = MisoDds_i;
+// 		end
+// 		else if (flagDirectMax) begin 
+// 			misoReg = MisoLdMax2870_i;
+// 		end
+// 		else if (flagDirectTemp) begin 
+// 			misoReg = misoTemp;
+// 		end
+// 		else if (flagDirectGpio2) begin 
+// 			misoReg = misoGpio2;
+// 		end
+// 		else if (flagDirectServInfo) begin 
+// 			misoReg = misoServInfo;
+// 		end
+// 		else begin 
+// 			misoReg = 1'bz;
+// 		end
+// 	end
+// end
 
 //====================================
 // MUX SpiM devices
@@ -352,6 +354,13 @@ ClkGen ClkGen
 	.Clk60Mhz_o			(clk60)
 );
 
+PulseFilter PulseFilter (
+	.Clk_i(clk24),
+	.Rst_i(initRst),
+	.Signal_i(Rst_i),
+	.SignalFilt_o(rstFiltered)
+);
+
 InitRst InitRst (
 	.clk_i		(clk24),
 	.signal_o	(initRst)
@@ -364,7 +373,7 @@ InterfaceArbiter
 )
 SpiSlaveArbiter
 (
-	.Rst_i		(Rst_i),
+	.Rst_i		(rstFiltered),
 	.Clk_i		(clk60),
 	
 	.Sck_i		(Sck_i),
@@ -392,7 +401,7 @@ SpiSlaveArbiter
 PacketAnalyzer4Mosi PacketAnalyzer4Mosi
 (
 	.Clk_i					(clk60),
-	.Rst_i					(Rst_i),
+	.Rst_i					(rstFiltered),
 
 	.DataFromSpi_i			(spiData),
 	.ValDataFromSpi_i		(spiDataVal),
@@ -418,7 +427,7 @@ PacketAnalyzer4Mosi PacketAnalyzer4Mosi
 PacketAnalyzer1Mosi	PacketAnalyzer1Mosi
 (
 	.Clk_i					(clk60),
-	.Rst_i					(Rst_i),
+	.Rst_i					(rstFiltered),
 	
 	.DataFromSpi_i			(spiData),
 	.ValDataFromSpi_i		(spiDataVal),
@@ -447,7 +456,7 @@ LmxWrapper #(
 	.DATA_WIDTH			(24)
 ) LmxWrapper(
 	.WrClk_i			(clk60),
-	.RdClk_i			(clk5),
+	.RdClk_i			(clk50),
 	.Rst_i				(initRst),
 	.Data_i				(spiData),
 	.Val_i				(valLmxDataToFifo),
@@ -467,7 +476,7 @@ DDSWrapper #(
 	.DATA_WIDTH			(80)
 ) DDSWrapper(
 	.WrClk_i			(clk60),
-	.RdClk_i			(clk5),
+	.RdClk_i			(clk50),
 	.Rst_i				(initRst),
 	.DdsWordNum_i		(ddsWordNum),
 	.DdsWordNumVal_i	(valWordNum),
@@ -503,7 +512,7 @@ DacWrapper #(
 	.DATA_WIDTH		(16)
 ) DacWrapper(
 	.WrClk_i		(clk60),
-	.RdClk_i		(clk5),
+	.RdClk_i		(clk50),
 	.Rst_i			(initRst),
 	.Data_i			(spiData),
 	.Val_i			(valDacDataToFifo),
@@ -519,7 +528,7 @@ AttenuatorWrapper #(
 	.DATA_WIDTH		(16)
 ) AttenuatorWrapper(
 	.WrClk_i		(clk60),
-	.RdClk_i		(clk5),
+	.RdClk_i		(clk50),
 	.Rst_i			(initRst),
 	.Data_i			(spiData),
 	.Val_i			(valAttDataToFifo),
@@ -535,7 +544,7 @@ ShiftRegWrapper #(
 	.DATA_WIDTH		(8)
 ) ShiftRegWrapper(
 	.WrClk_i		(clk60),
-	.RdClk_i		(clk5),
+	.RdClk_i		(clk20),
 	.Rst_i			(initRst),
 	.Data_i			(spiData),
 	.Val_i			(valShRegDataToFifo),